Bhattacharya, Sourav and González-Vélez, Horacio (2020) 3D-Stacked Memory For Shared-Memory Multithreaded Workloads. In: ECMS 2020 Proceedings Edited by: Mike Steglich, Christian Muller, Gaby Neumann, Mathias Walther. European Council for Modeling and Simulation, pp. 376-383. ISBN 9783937436685
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Abstract
This paper aims to address the issue of CPU-memory intercommunication latency with the help of 3D stacked memory. We propose a 3D-stacked memory configuration, where a DRAM module is mounted on top of the CPU to reduce latency. We have used a comprehensive simulation environment to assure both fabrication feasibility and energy efficiency of the proposed 3D stacked memory modules. We have evaluated our proposed architecture by running PARSEC 2.1, a benchmark suite for shared-memory multithreaded workloads. The results demonstrate an average of 40% improvement over conventional DDR3/4 memory architectures.
Item Type: | Book Section |
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Subjects: | Q Science > QA Mathematics > Electronic computers. Computer science T Technology > T Technology (General) > Information Technology > Electronic computers. Computer science Q Science > QA Mathematics > Computer software T Technology > T Technology (General) > Information Technology > Computer software |
Divisions: | School of Computing > Staff Research and Publications |
Depositing User: | Caoimhe Ní Mhaicín |
Date Deposited: | 25 May 2020 08:57 |
Last Modified: | 25 May 2020 08:57 |
URI: | https://norma.ncirl.ie/id/eprint/4215 |
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